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Structure Products Type Features
Silicon Monolithic USB High side switch IC
BD2221G
Single channel of low ON resistance (Typ = 160m) Nch power MOSFET built in 500mA Continuous current load Over current detection Output off-latch operation Under voltage lockout (UVLO) Thermal shutdown (TSD) Soft start function Open drain error flag output Active "Low" control logic Reverse-current protection when power switch off SSOP5 Package
Absolute maximum ratings (Ta=25C) Parameter Supply voltage Enable voltage /OC voltage /OC current OUT voltage Storage temperature Power dissipation Symbol VIN V/EN V/OC I/OC VOUT TSTG PD Rating -0.3 ~ 6.0 -0.3 ~ 6.0 -0.3 ~ 6.0 ~5 -0.3 ~ 6.0 -55 ~ 150 675
*1
Unit V V V mA V C mW
*1 Mounted on 70mm * 70mm * 1.6mm grass-epoxy PCB. Derating : 5.4mW / C for operating above Ta=25C. * This product is not designed for protection against radioactive rays.
Operating conditions Parameter Operating voltage Operating temperature Continuous output current Symbol VIN TOPR IOUT MIN 2.7 -40 0 TYP 5.0 MAX 5.5 85 500 Unit V C mA
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Electric characteristics (unless otherwise specified VIN = 5.0V, Ta = 25C, CIN=1F, COUT=1F)
Spec Parameter Symbol Min. DC characteristics Operating Current Standby Current IDD ISTB 2.0 /EN input voltage V/EN /EN input current ON resistance Switch leak current Reverse leak current Over current threshold Output LOW voltage /OC output Low voltage UVLO Threshold AC characteristics Output rise time Output rise delay time Output fall time Output fall delay time Blanking time TON1 TON2 TOFF1 TOFF2 TBLANK 10 1 1.5 1 3 15 6 10 20 40 20 ms ms s s ms RL = 20 RL = 20 RL = 20 RL = 20 I/EN RON ILSW IREV ITH ISC V/OC VTUVH VTUVL -1.0 0.5 0.35 2.1 2.0 0.01 160 2.3 2.2 0.8 1.0 210 1.0 1.0 1.0 0.4 2.5 2.4 V A m A A A A V V V Low input V/EN =0V or 5V IOUT = 50mA 110 0.01 160 5 A A V Typ. Max. Unit
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Condition
V/EN = 0V, VOUT = Open V/EN = 5V, VOUT = Open High input
V/EN = 5V, VOUT = 0V VOUT = 5.5V, VIN = 0V
VOUT = 0V , COUT=47F (RMS) I/OC = 0.5mA Increasing VIN Decreasing VIN
Over current protection, shutdown timing
TBLANK TBLANK
Timing chart at output rise / fall time
TOFF1 TON1
Output Current Switch status ON OFF ON
VOUT 10%
90%
90% 10% TOFF2
/OC output V/EN
TON2 V/EN 50% 50%
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Block diagram
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GND
OCD
Delay Counter
SQ R
/OC
UVLO /EN VIN
Pin description Pin No. 1 2 3 4 5 Pin Name VIN GND /EN /OC VOUT
Charge pump
TSD
VOUT
Function Power supply input. Input terminal to switch and power supply input terminal of the internal circuit. Ground. Enable input. Power switch on at Low level. Over current output. Low level at over current detection. Open drain output. Switch output.
Package
DY
Lot No.
SSOP5 (Unit : mm)
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4/4 Cautions on use
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(1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Power supply and GND line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. Pay attention to the interference by common impedance of layout pattern when there are plural power supplies and GND lines. Especially, when there are GND pattern for small signal and GND pattern for large current included the external circuits, separate each GND pattern. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use a capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (3) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (4) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (5) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (6) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (7) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. (8) Thermal shutdown circuit (TSD) When junction temperatures become 170C (typ) or higher, the thermal shutdown circuit operates and turns a switch OFF. The thermal shutdown circuit, which is aimed at isolating the LSI from thermal runaway as much as possible, is not aimed at the protection or guarantee of the LSI. Therefore, do not continuously use the LSI with this circuit operating or use the LSI assuming its operation. (9) Thermal design Perform thermal design in which there are adequate margins by taking into account the power dissipation (Pd) in actual states of use.
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Notice
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Notes
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